ASIC - to - Spartan Adaptation Adapting ASIC Designs for Use with Spartan FPGAs

Spartan FPGAs are an exciting, new alternative for implementing digital designs that, previously, would have employed ASIC 1 technology. Pre-existing ASIC intellectual property 2 can be adapted for use with Spartan devices by following a straightforward procedure. Each step of the pro-1. For the purposes of this application note, ASIC refers to mask gate array. 2. The term intellectual property includes preexisting design material (i.e. legacy code), cores, and vendor ASIC libraries. cedure is explained in detail. Guidelines show how an ASIC design, in the form of an RTL-level HDL 3 file, can be revised to take full advantage of the Spartan series' capabilities , thereby achieving efficient, high-performance implementations. 3. Two kinds of Hardware Description Language (HDL) are recommended for the ASIC-to-FPGA design adaptation: VHDL and Verilog.